-- generated by newgenasym Wed Oct 06 11:37:19 2010

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity icm24cxx is
    port (    
	E0:        IN     STD_LOGIC;    
	E1:        IN     STD_LOGIC;    
	E2:        IN     STD_LOGIC;    
	SCL:       IN     STD_LOGIC;    
	SDA:       INOUT  STD_LOGIC;    
	VCC:       IN     STD_LOGIC;    
	VSS:       IN     STD_LOGIC;    
	WC_N:      IN     STD_LOGIC);
end icm24cxx;
