-- generated by newgenasym Mon Mar 16 14:06:54 2009

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity adf4350 is
    port (    
	AGND:      IN     STD_LOGIC;    
	AGNDVCO1:  IN     STD_LOGIC;    
	AGNDVCO2:  IN     STD_LOGIC;    
	AGNDVCO3:  IN     STD_LOGIC;    
	AVDD:      IN     STD_LOGIC;    
	CE:        IN     STD_LOGIC;    
	CLK:       IN     STD_LOGIC;    
	CPGND:     IN     STD_LOGIC;    
	CPOUT:     OUT    STD_LOGIC;    
	DATA:      IN     STD_LOGIC;    
	DGND:      IN     STD_LOGIC;    
	DVDD:      IN     STD_LOGIC;    
	EP:        IN     STD_LOGIC;    
	LD:        OUT    STD_LOGIC;    
	LE:        IN     STD_LOGIC;    
	MUXOUT:    OUT    STD_LOGIC;    
	PDBRF:     IN     STD_LOGIC;    
	REFIN:     IN     STD_LOGIC;    
	RFOUTA_NEG: OUT    STD_LOGIC;    
	RFOUTA_POS: OUT    STD_LOGIC;    
	RFOUTB_NEG: OUT    STD_LOGIC;    
	RFOUTB_POS: OUT    STD_LOGIC;    
	RSET:      INOUT  STD_LOGIC;    
	SDGND:     IN     STD_LOGIC;    
	SDVDD:     IN     STD_LOGIC;    
	SW:        IN     STD_LOGIC;    
	TEMP:      OUT    STD_LOGIC;    
	VCOM:      INOUT  STD_LOGIC;    
	VP:        IN     STD_LOGIC;    
	VREF:      INOUT  STD_LOGIC;    
	VTUNE:     IN     STD_LOGIC;    
	VVCO1:     IN     STD_LOGIC;    
	VVCO2:     IN     STD_LOGIC);
end adf4350;
